Hardware Application Engineer

Hardware Application Engineer

Arm

Cambridge, United Kingdom

About the job role

As a Applications Engineer, you will be learning about Arm technology and products and eventually be responsible for providing Arm's partners with technical guidance on IP integration, configuration and performance aspects, investigating issues, identifying solutions using RTL simulations and effectively communicating your findings. Every day you’ll be faced with a different set of technical challenges on a variety of different products.

In this role, you will also have the opportunity to visit customer sites around the world to deliver technical training courses to their engineering teams, whilst also providing reviews and advice on their system designs.

Responsibilities

  • Provide fast and accurate answers to customer questions about Arm CPUs & System IP;
  • Create and deliver technical training material, both onsite and remotely;
  • Perform onsite customer SoC design reviews using Arm IP and provide functionality and optimization recommendations;
  • Work with Arm IP design and product management teams to improve partners experience and influence IP feature development;
  • Test IP and provide feedback to design teams prior to release to customers;
  • Create and modify web-based knowledge base articles and application notes;
  • Develop tools and techniques to aid Application Engineers find solutions more efficiently.

Required Skills and Experience

  • BSc, MSc or PhD degree qualification in Electronics/Computer Engineering or equivalent;
  • Ability to understand and use Hardware Description Languages (HDLs) such as Verilog, SystemVerilog or VHDL;
  • Strong interest in and understanding of CPU architectures and SoC design principles;
  • Experience in using RTL simulation tools for debugging purposes;
  • Ability to learn and communicate IP product features and their interaction with the rest of the SoC.

“Nice To Have” Skills and Experience

  • Familiarity with one or more AMBA protocols for on-chip communication;
  • Understanding of hardware cache coherency principles;
  • Knowledge of the Arm Architecture.

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